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NEURA PARSE
NODERIQ hardware cards

NQ-L70 / Bench evaluation

NODERIQ Link L70

Robot and sensor I/O

A compact I/O bridge profile for observing CAN and serial devices, aligning service records and connecting existing controllers to mission-level software.

EV1 is a defined evaluation specification. Physical board measurements, electrical release and completed system integration are not yet asserted.

NODERIQ Link L70 in a benchtop integration arrangement.
Benchtop integration layout

Hardware views

Give every physical bus a clear boundary.

The product image and integration arrangement share the same board identity. Engineering plans and the machine-readable specification own dimensions; generated imagery does not establish an as-built board or a successful test.

Hardware viewsNQ-L70 / EV1

NODERIQ Link L70 hardware view with its cooling and connector layout.
EV1 product architecture / specified placement and connector arrangement
Open original file

EV1 engineering record

Define the space before the enclosure.

PCB size, assembled height and installation space are separate allocations. Reserve connector access and cable bends, and verify the final fastener and enclosure stack.

Mechanical allocation

PCB outline
70 × 50 mm
PCB thickness
1.6 ± 0.15 mm
Assembly height
16 mmTotal allocated height across both sides, including the PCB.
Installation reserve
90 × 80 × 30 mmInitial access allowance; validate the actual harness and enclosure.
Mounting holes
4 × Ø 2.7 mm
Hole centres
(3.5, 3.5) · (66.5, 3.5) · (66.5, 46.5) · (3.5, 46.5)Millimetres from the lower-left PCB origin, viewed from the top.

Power and processing allocation

Processor basis
STM32H753VIT6 basis
Bench input
4.75–5.25 V
Board power allocation
4 WSteady-state screening limit, not a measured consumption result.
Bench supply
5 V / 1.5 AA supply rating does not authorise the same current on every connector.
NODERIQ Link L70 dimensional plan with PCB, mounting and installation allocations.
Dimensional plan / English source / millimetresOpen the full drawing

Interfaces and harnesses

Make every connection explicit.

Connector locations are public placement reserves. They do not substitute for a released pin map, selected mating part or electrical protection review.

J1USB-CUSB-C envelope
5 V bench input and USB service.
J2CAN A4-position terminal envelope
A separately terminated bus with its own reference domain.
J3CAN B4-position terminal envelope
Second CAN bus; do not join isolated grounds through a cable.
J4RS4854-position terminal envelope
Differential sensor link; record termination and bus direction.
J5SERVICE8-position locking header
3.3 V UART and time-reference reserve.

Integration roles

Keep intelligence and physical authority connected.

Bus receipt, source freshness and physical completion remain different records. L70 is not a safety controller or a direct motor-power stage.

Mobile robot service bay

Observe controller and instrument buses through named harnesses, with the existing controller and stop circuit retained.

Mixed sensor gateway

Collect serial and CAN observations without treating a received frame as proof that a task or physical action completed.

Hardware observations can support NODERIQ mission context. NowFlow supplies the workflow role and NeuraOS the edge foundation; a board illustration does not establish that those layers are integrated or authorised to control a machine.

Product documents

A complete record for the evaluation bench.

Use the product guide, dimensioned plans, original images and blank measurement record together. Technical downloads retain their English source language and stated units.

Bench qualification

Measure the complete configuration.

Two independent CAN fixtures at 500 kbit/s arbitration and a 2 Mbit/s data-phase target; a separate RS-485 loopback fixture. Record transceiver, termination and firmware.

Isolation barriers, protection, pin multiplexing and EMC are design allocations requiring electrical release and bench evidence. No isolation voltage, safety integrity or supported third-party control protocol is claimed.

Component sources and current limits